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memory - 刷新写组合缓冲区

转载 作者:行者123 更新时间:2023-12-05 04:28:20 24 4
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在 x86_64 CPU 上,我将一些页表条目标记为写合并。这些页面由 PCIe BAR 支持。当我在pages中存入内存后,如何flush write-combining buffer?直觉上,似乎 sfence(或 mfence)应该这样做,但我不确定是否保证刷新。 Intel 手册对 sfence 指令说明如下:

Orders processor execution relative to all memory stores prior to theSFENCE instruction. The processor ensures that every store prior toSFENCE is globally visible before any store after SFENCE becomesglobally visible. The SFENCE instruction is ordered with respect tomemory stores, other SFENCE instructions, MFENCE instructions, and anyserializing instructions (such as the CPUID instruction). It is notordered with respect to memory loads or the LFENCE instruction.

目前还不清楚“全局可见”是什么意思。这是指 CPU 中的所有其他内核还是指整个系统,包括 I/O 设备(在这种情况下需要刷新)?

或者,clflush 是我想要的吗?

最佳答案

在对 different StackOverflow question 的回答中, Paul A. Clayton 引用了英特尔手册第 11.3 节中的以下引述:

If the WC buffer is partially filled, the writes may be delayed untilthe next occurrence of a serializing event; such as, an SFENCE orMFENCE instruction, CPUID execution, a read or write to uncachedmemory, an interrupt occurrence, or a LOCK instruction execution.

因此,英特尔保证 sfencemfence 将刷新写入组合缓冲区。

关于memory - 刷新写组合缓冲区,我们在Stack Overflow上找到一个类似的问题: https://stackoverflow.com/questions/72639190/

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