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VHDL:除以两个整数常量的上限和下限

转载 作者:行者123 更新时间:2023-12-04 16:28:46 24 4
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在 VHDL 中,我正在寻找一种方法来获取一个实体的两个整数参数,将一个除以另一个作为 float ,然后找到这个浮点比率的下限和上限,然后将其存储为 vhdl 整数常量。

library ieee;
use ieee.std_logic_1164.all;

entity something is
generic(
N: natural := 4;
M: natural := 150
);
port(
sys_clk :in std_logic;
sys_rst :in std_logic;

datai :in std_logic_vector(M-1 downto 0);
datao :out std_logic_vector(N-1 downto 0)
);
end entity;


architecture rtl is something is
--how to calculate ceiling of M / N?
constant ratio_ceiling :integer := integer(real(M)/real(N));

--how to calculate floor of M / N?
constant ratio_floor :integer := integer(real(M)/real(N));

begin

end architecture;

最佳答案

代码:

library ieee;
use ieee.std_logic_1164.all;
use ieee.math_real.all;

entity something is
generic(
N: natural := 4;
M: natural := 150
);
port(
sys_clk :in std_logic;
sys_rst :in std_logic;

datai :in std_logic_vector(M-1 downto 0);
datao :out std_logic_vector(N-1 downto 0)
);
end entity;


architecture rtl of something is
--how to calculate ceiling of M / N
constant ratio_ceiling :integer := integer(ceil(real(M)/real(N)));

--how to calculate floor of M / N
constant ratio_floor :integer := integer(floor(real(M)/real(N)));

begin

process
begin
report "ceil: " & integer'image(ratio_ceiling);
report "floor: " & integer'image(ratio_floor);
wait;
end process;
end architecture;

输出:

C:\something> ghdl -a --std=08 --ieee=synopsys --work=work something.vhd

C:\something> ghdl --elab-run --std=08 --ieee=synopsys something --vcd=waves.vcd --ieee-asserts=disable

something.vhd:33:12:@0ms:(report note): ceil: 38
something.vhd:34:12:@0ms:(report note): floor: 37

关于VHDL:除以两个整数常量的上限和下限,我们在Stack Overflow上找到一个类似的问题: https://stackoverflow.com/questions/56618550/

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