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assembly - 为什么编译器在做 64 位操作时会改变 move to move?

转载 作者:行者123 更新时间:2023-12-04 15:20:55 27 4
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我正在编程以下内容:

__asm__ volatile ("movq %%rax, %%mm1\n"
"movq %%rcx, %%mm2\n"
: : "a" (0xDEADBEEFDEADBEEF), "c" (0xBADFACE5BADFACE5));

在这种情况下,我将值从 rax 移动到 mm1,它们都是 64b 寄存器(将 qword 值从一个寄存器移动到另一个)。但是当我编译我的代码时,我看到:
mov  rax, 0xDEADBEEFDEADBEEF
mov rcx, 0xBADFACE5BADFACE5
movd mm1, rax <-------------- Why it is doing a dword operation ??
movd mm2, rcx <-------------- Why it is doing a dword operation ??

我正在以 64 位模式编译我的代码,我不确定为什么它将 64 位操作更改为 32 位。

最佳答案

来自 this bug :

This is done on purpose to provide backward compatibility since vmovq isn't in original x86-64 spec and older assemblers don't support it. From i386-opc.tbl in binutils:

These really shouldn't allow for Reg64 (movq is the right mnemonic for copying between Reg64/Mem64 and RegXMM/RegMMX, as is mandated by Intel's spec). AMD's spec, having been in existence for much longer, failed to recognize that and specified movd for 32- and 64-bit operations.

vmovd really shouldn't allow for 64bit operand (vmovq is the right mnemonic for copying between Reg64/Mem64 and RegXMM, as is mandated by Intel AVX spec). To avoid extra template in gcc x86 backend and support assembler for AMD64, we accept 64bit operand on vmovd so that we can use one template for both SSE and AVX instructions.

关于assembly - 为什么编译器在做 64 位操作时会改变 move to move?,我们在Stack Overflow上找到一个类似的问题: https://stackoverflow.com/questions/31844496/

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