embedded - 中断的尾链

Question

什么是ARM Cortex M3中NVIC支持的中断的尾链。

Answer 1

Tail-chaining is back-to-back processing of exceptions without the overhead of state saving and restoration between interrupts. The processor skips the pop of eight registers and push of eight registers when exiting one ISR and entering another because this has no effect on the stack contents. Cortex™-M3 Technical Reference Manual

从根本上讲，这意味着在不重复进行处理的情况下处理挂起的中断。

如果您想了解更多详细信息，请推荐这本书:

The Definitive Guide to the ARM Cortex-M3