arm - 调试 Cortex M3 (ARM) Embedded - 您如何从 xPSR.ISR 判断正在运行什么 ISR？

Question

我正在调试 arm-family cpu (Cortex M3) 上的固件。

调试器显示 CPU 寄存器，包括一个称为“xPSR”的寄存器，其中包含一个称为“ISR”的子字段。 CPU寄存器中的模式是“Mode=Handler”，这意味着m3 cpu处于中断处理程序而不是“线程”模式。我知道的就这么多。

我在那里看到字段 xPSR.ISR = 15 的值。我认为那一定是十六进制的 15(十二月 21)。我猜测这是查看 ISR 向量表注释的“系统定时器滴答 0B”中断。实际上，我现在猜测它是十进制的 15，它是我正在查看的 SysTick 定时器中断处理程序。(请注意，因为代码是汇编单行默认处理程序的情况，其中大约 100 个不同的 asm 标签落在一个地方，很难从代码中看出是谁调用了 ISR。)

然而，我对 Cortex M3 芯片还很陌生，我对 ARM7TDMI 的了解因为不使用它而逐渐淡化，以至于我不记得了。我在任何地方的文档中都找不到这个。

谁能告诉我如何解决这个问题？

Answer 1

异常编号 15 是 Cortex M3 上的 SYSTICK 中断。

ARM Cortex M3 Technical Reference Manual有一个表(表 5-1 - 异常类型)列出了 M3 使用的各种中断号。

Exception type    Position       Priority       Description
--------------    ------------   --------       ------------------------------------
Reset               1             –3 (highest)  Invoked on power up and warm reset. On first instruction, 
                                                drops to lowest priority (Thread mode). This is asynchronous.
Non-maskable Int    2             –2            Cannot be stopped or pre-empted by any exception but reset. 
                                                This is asynchronous.
Hard Fault          3             –1            All classes of Fault, when the fault cannot activate because of 
                                                priority or the Configurable Fault handler has been disabled. 
                                                This is synchronous.
Memory Management   4             Configurable  Memory Protection Unit (MPU) mismatch, including access 
                                                violation and no match. This is synchronous. This is used 
                                                even if the MPU is disabled or not present, to support the 
                                                Executable Never (XN) regions of the default memory map.
Bus Fault           5             Configurable  Pre-fetch fault, memory access fault, and other 
                                                address/memory related. This is synchronous when precise 
                                                and asynchronous when imprecise.
Usage Fault         6             Configurable  Usage fault, such as Undefined instruction executed or illegal 
                                                state transition attempt. This is synchronous.
  -                 7-10            -           Reserved
SVCall              11            Configurable  System service call with SVC instruction. This is 
                                                synchronous.
Debug Monitor       12            Configurable  Debug monitor, when not halting. This is synchronous, but 
                                                only active when enabled. It does not activate if lower priority 
                                                than the current activation.
  -                 13              -           Reserved
PendSV              14            Configurable  Pendable request for system service. This is asynchronous 
                                                and only pended by software.
SysTick             15            Configurable  System tick timer has fired. This is asynchronous.

External Interrupt  16 and above  Configurable  Asserted from outside the core, INTISR[239:0], and fed 
                                                through the NVIC (prioritized). These are all asynchronous.