linux-kernel - 为什么要读取 __turn_mmu_on 中的 id 寄存器？

Question

看了几天ARM linux内核启动过程的代码，除了函数__turn_mmu_on:中的几个比较棘手的部分，我理解了大部分内容。

        .align  5
   __turn_mmu_on:
      mov   r0, r0
      mcr   p15, 0, r0, c1, c0, 0       @ write control reg
      mrc   p15, 0, r3, c0, c0, 0       @ read id reg
      mov   r3, r3
      mov   r3, r3
      mov   pc, r13
   ENDPROC(__turn_mmu_on)

最后一条指令 mov pc, r13将分支到 __mmap_switched ，如下:

    __mmap_switched:
        adr r3, __switch_data + 4
        ....

为什么有必要将它对齐到 32 字节(这是缓存线的大小)边界？

因为寄存器r3，读取ID寄存器的值(甚至没有使用其值)的目的是什么？在指令 adr r3, __switch_data + 4 中被简单地覆盖?

Answer 1

对齐可能不是必需的，但可能用于确保整个函数适合缓存行，因此最后几条指令将从缓存中执行，而不必从内存中获取(即使函数应该MMU 保持在同一地址，因为它是身份映射)。

追踪 MRC 的起源并不容易说明，但我想我 found it :

Date: 2004-04-04 04:35 +200
To: linux-arm-patches
Subject: [Linux-arm-patches] 1204.1: XSCALE processor stalls when enabling MMU
--- kernel-source-2.5.21-rmk/arch/arm/kernel/head.S    Sun Jun  9 07:26:29 2002
+++ kernel-2.5.21-was/arch/arm/kernel/head.S    Fri Jul 12 20:41:42 2002
@@ -118,9 +118,7 @@ __turn_mmu_on:
     orr    r0, r0, #2            @ ...........A.
 #endif
     mcr    p15, 0, r0, c1, c0
-    mov    r0, r0
-    mov    r0, r0
-    mov    r0, r0
+    cpwait    r10
     mov    pc, lr
[...]
+/*
+ * cpwait - wait for coprocessor operation to finish
+ * this is the canonical way to wait for cp updates
+ * on PXA2x0 as proposed by Intel
+ */
+    .macro    cpwait reg
+    mrc    p15, 0, \reg, c2, c0, 0    @ arbitrary cp reg read
+    mov    r0, r0                    @ nop
+    sub    pc, pc, #4                @ nop
+    .endm

随后对该补丁优点的讨论 ended in the current approach :

...
We can however get closer to the Xscale recommended sequence by knowing how things work on other CPUs, and knowing what we're doing here. If we insert the following instruction after the mcr, then this should solve your issue.

mrc p15, 0, r0, c1, c0

Since the read-back of the same register is guaranteed by the ARM architecture manual to return the value that was written there (if it doesn't, the CPU isn't an ARM compliant implementation), this means we can guarantee that the write to the register has taken effect. The use of the "mov r0, r0" instructions are the same as in the CPWAIT macro. The mov pc, lr is equivalent to the "sub pc, pc, #4" (they are defined to be the same class of instructions), so merely adding one instruction should guarantee that the Xscale works as expected.
...

原始补丁来自 Lothar Wassmann，最终代码可能来自 Russel King。