assembly - ARM 皮质 M0/M3/M4 :Why PC is always Even number in Thumb State

Question

据我了解，ARM Cortex-M CPU 始终处于 Thumb 状态，这意味着:

Thumb state indicated by program counter being odd (LSB = 1). Branching to an even address will cause an exception, since switching back to ARM state is not allowed.

但是，当我使用 CortexM0 和 M4 CPU 时， PC 始终是偶数 .每次我分支，LR记录PC+1，每次我返回，PC给出LR-1。

例如，如果 lr = 0x0000_01D5，

执行

BX lr

那么PC应该是0x0000_01D5，而它给出0x0000_01D4。

这不是不可能吗？

任何评论将不胜感激。

Answer 1

来自 Cortex-M4 Technical Reference Manual :

2.3.1 Program counter

Register R15 is the Program Counter (PC).

Bit [0] is always 0, so instructions are always aligned to word or halfword boundaries.

阅读自 PC不应该返回一个奇怪的地址。但是，当您写信给 PC 时, LSB 值加载到 EPSR T 位。来自 Cortex-M3 Devices Generic User Guide - 2.1.3. Core registers

Thumb state

The Cortex-M3 processor only supports execution of instructions in Thumb state. The following can clear the T bit to 0:

instructions BLX, BX and POP{PC}

restoration from the stacked xPSR value on an exception return

bit[0] of the vector value on an exception entry or reset.

Attempting to execute instructions when the T bit is 0 results in a fault or lockup. See Lockup for more information.

换句话说，您可以从 PC 读取偶数值。但是一般情况下是不能写出这样的值的。