assembly - 为什么 ARM LSL 与 LSR 的允许偏移值范围不同？

Question

为什么LSL的允许偏移值为[0, 31]，LSR的允许偏移值为[1, 32]？
在 LSL 中移位 0 位对任何应用程序有何用处？为什么在 LSR 中不允许 0 shift？为什么 LSL 不允许 32 位移位？

Answer 1

此限制适用于立即数移位。寄存器移位不受此类限制。LSL 允许 0 表示“无移位”。这是一种特殊情况，标志设置指令的C标志没有被修改。LSR 和 ASR by 0 的行为方式与 LSL by 0 相同，因此 CPU 设计人员决定使立即操作数 0 表示移位 32，从而启用附加功能。对于 ROR 的情况，移位 0 表示特殊的“向右旋转扩展”指令 RRX ，因为旋转 32 不是很有用。
引用例如到 ARM7TDMI 数据表，它说:

Note LSL #0 is a special case, where the shifter carry out is the old value of the CPSR C flag. The contents of Rm are used directly as the second operand.

The form of the shift field which might be expected to correspond to LSR #0 is used to encode LSR #32, which has a zero result with bit 31 of Rm as the carry output. Logical shift right zero is redundant as it is the same as logical shift left zero, so the assembler will convert LSR #0 (and ASR #0 and ROR #0) into LSL #0, and allow LSR #32 to be specified.

The form of the shift field which might be expected to give ASR #0 is used to encode ASR #32. Bit 31 of Rm is again used as the carry output, and each bit of operand 2 is also equal to bit 31 of Rm. The result is therefore all ones or all zeros, according to the value of bit 31 of Rm.

The form of the shift field which might be expected to give ROR #0 is used to encode a special function of the barrel shifter, rotate right extended (RRX). This is a rotate right by one bit position of the 33 bit quantity formed by appending the CPSR C flag to the most significant end of the contents of Rm [...].

在 Thumb (T32) 模式下，约定进行了调整。 Thumb 缺少一个独特的 MOVS Rd, Rn 指令，因此 LSLS Rd, Rn, #0 用于此目的。 LSR Rd, Rn, #imm5 和 ASR Rd, Rn, #imm5 的行为方式与它们在 A32 模式下的行为方式相同。 #32 的立即数是通过将五位立即数字段设置为零来编码的。假设指令 ROR Rd, Rn, #imm5 不存在，因为它所在的操作码空间用于编码

ADDS Rd, Rn, Rm
SUBS Rd, Rn, Rm
ADDS Rd, Rn, #imm3
SUBS Rd, Rn, #imm3

反而。