cpu - 超线程 CPU 是实现并行还是仅实现并发？

Question

超线程 CPU 是实现并行还是仅实现并发(上下文切换)？

我的猜测是没有并行性，只有通过上下文切换的并发性。

Answer 1

单个物理 CPU 具有超线程的核心显示为 两个逻辑 CPU 到操作系统。 CPU还是单CPU，所以是 “作弊”有点——虽然操作系统看到每个内核有两个 CPU，但实际的 CPU 硬件只有一个 单组执行资源 对于每个核心。 CPU 假装它有比它更多的内核，并且它使用自己的逻辑来加速程序执行。超线程允许两个逻辑 CPU 内核 共享物理执行资源 .这可以在一定程度上加快速度——例如，如果一个虚拟 CPU 停止并等待，另一个虚拟 CPU 可以借用它的执行资源。此外，空闲资源可用于同时执行其他任务。 超线程可以帮助加快您的系统速度，但它远不及拥有额外内核 .真正意义上的并行(如 GPGPU 架构或多个物理内核中的独立执行)是 无法实现 在单核处理器上，除非您正在考虑超标量架构。

发件人: https://en.wikipedia.org/wiki/Superscalar_processor

Superscalar processors differ from multi-core processors in that the several execution units are not entire processors. A single processor is composed of finer-grained execution units such as the ALU, integer multiplier, integer shifter, FPU, etc. There may be multiple versions of each execution unit to enable execution of many instructions in parallel. This differs from a multi-core processor that concurrently processes instructions from multiple threads, one thread per processing unit (called "core"). It also differs from a pipelined processor, where the multiple instructions can concurrently be in various stages of execution, assembly-line fashion.

发件人: http://www.cslab.ece.ntua.gr/courses/advcomparch/2007/material/readings/HYPERTHREADING%20TECHNOLOGY%20IN%20THE%20NETBURST%20MICROARCHITECTURE.pdf

Hyper Threading technology makes a single physical processor appear to be multiple logical processors. There is one copy of the architectural state for each logical processor, and these processors share a single set of physical execution resources. From a software or architecture perspective, this means operating systems and user programs can schedule processes or threads to logical processors as they would on conventional physical processors in a multiprocessor system. From a microarchitecture perspective, it means that instructions from logical processors will persist and execute simultaneously on shared execution resources. This can greatly improve processor resource utilization. The hyper threading technology implementation on the Netburst microarchitecture has two logical processors on each physical processor. Figure 1 shows a conceptual view of processors with hyperthreading technology capability. Each logical processor maintains a complete set of the architectural state. The architectural state consists of registers, including general-purpose registers, and those for control, the advanced programmable interrupt controller (APIC), and some for machine state. From a software perspective, duplication of the architectural state makes each physical processor appear to be two processors. Each logical processor has its own interrupt controller, or APIC, which handles just the interrupts sent to its specific logical processor.

注:对于使用超标量内核(即每个周期可以发出多个操作的内核)的同时多线程处理，执行过程明显不同。