interrupt - 在不中断 UART 的情况下写入非 volatile 存储器会中断 STM32F4XX 上的执行

Question

我在 UART 外设上出现了几个 OVERRUN 错误，因为我一直在接收 UART 数据，而我的代码因在闪存上执行写操作而停止。

我正在使用 UART 中断，应用笔记 AN3969 对此进行了解释。 :

EEPROM emulation firmware runs from the internal Flash, thus access to the Flash will be stalled during operations requiring Flash erase or programming (EEPROM initialization, variable update or page erase). As a consequence, the application code is not executed and the interrupt can not be served.

This behavior may be acceptable for many applications, however for applications with realtime constraints, you need to run the critical processes from the internal RAM.

In this case:

1. Relocate the vector table in the internal RAM.
2. Execute all critical processes and interrupt service routines from the internal RAM. The compiler provides a keyword to declare functions as a RAM function; the function is copied from the Flash to the RAM at system startup just like any initialized variable. It is important to note that for a RAM function, all used variable(s) and called function(s) should be within the RAM.

所以我在互联网上搜索并找到了AN4808其中提供了有关如何在闪存操作时保持中断运行的示例。

我继续修改我的代码:

链接器脚本:向 SRAM 添加向量表并定义 .ramfunc 部分

/* stm32f417.dld */
ENTRY(Reset_Handler)

MEMORY
{
    ccmram(xrw)       : ORIGIN = 0x10000000, LENGTH = 64k
    sram              : ORIGIN = 0x20000000, LENGTH = 112k
    eeprom_default    : ORIGIN = 0x08004008, LENGTH = 16376
    eeprom_s1         : ORIGIN = 0x08008000, LENGTH = 16k
    eeprom_s2         : ORIGIN = 0x0800C000, LENGTH = 16k
    flash_unused      : ORIGIN = 0x08010000, LENGTH = 64k
    flash             : ORIGIN = 0x08020000, LENGTH = 896k
}

_end_stack = 0x2001BFF0;

SECTIONS 
{
  . = ORIGIN(eeprom_default);
  .eeprom_data :
  {
    *(.eeprom_data)
  } >eeprom_default

  . = ORIGIN(flash);

  .vectors :
    {
        _load_vector = LOADADDR(.vectors);
        _start_vector = .;
        *(.vectors)
        _end_vector = .;
    } >sram AT >flash

    .text :
    {
        *(.text)
        *(.rodata)
        *(.rodata*)
        _end_text = .;
    } >flash

    .data : 
    {
        _load_data = LOADADDR(.data);
        . = ALIGN(4);
        _start_data = .;
        *(.data)
    } >sram AT >flash


    .ramfunc :
    {
        . = ALIGN(4);
        *(.ramfunc)
        *(.ramfunc.*)
        . = ALIGN(4);
        _end_data = .;
    } >sram AT >flash

    .ccmram :
    {
        _load_ccmram = LOADADDR(.ccmram);
        . = ALIGN(4);
        _start_ccmram = .;
        *(.ccmram)
        *(.ccmram*)
        . = ALIGN(4);
        _end_ccmram = .;
    } > ccmram AT >flash

    .bss :
    {
        _start_bss = .;
        *(.bss)
        _end_bss = .;
    } >sram

    . = ALIGN(4);

    _start_stack = .;


}

_end = .;
PROVIDE(end = .);

重置处理程序:添加向量表复制 SRAM 并定义 .ramfunc 部分

void Reset_Handler(void)
{
  unsigned int *src, *dst;

  /* Copy vector table from flash to RAM */
  src = &_load_vector;
  dst = &_start_vector;
  while (dst < &_end_vector)
    *dst++ = *src++;

  /* Copy data section from flash to RAM */
  src = &_load_data;
  dst = &_start_data;
  while (dst < &_end_data)
    *dst++ = *src++;

  /* Copy data section from flash to CCRAM */
  src = &_load_ccmram;
  dst = &_start_ccmram;
  while (dst < &_end_ccmram)
    *dst++ = *src++;

  /* Clear the bss section */
  dst = &_start_bss;
  while (dst < &_end_bss)
    *dst++ = 0;

  SystemInit();
  SystemCoreClockUpdate();

  RCC->AHB1ENR = 0xFFFFFFFF;
  RCC->AHB2ENR = 0xFFFFFFFF;
  RCC->AHB3ENR = 0xFFFFFFFF;
  RCC->APB1ENR = 0xFFFFFFFF;
  RCC->APB2ENR = 0xFFFFFFFF;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOFEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOGEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOHEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOIEN;
  RCC->AHB1ENR |= RCC_AHB1ENR_CCMDATARAMEN;

  main();

  while(1);
}

system_stm32f4xxx.c: 未注释的 VECT_TAB_SRAM 定义

/*!< Uncomment the following line if you need to relocate your vector Table in
     Internal SRAM. */
#define VECT_TAB_SRAM
#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
                                   This value must be a multiple of 0x200. */

添加了 RAMFUNC 的定义来设置节属性:

#define RAMFUNC __attribute__ ((section (".ramfunc")))

在 UART 相关函数和原型(prototype)之前添加了 RAMFUNC，以便它从 RAM 运行。

RAMFUNC void USART1_IRQHandler(void)
{
  uint32_t sr = USART1->SR;
  USART1->SR & USART_SR_ORE ? GPIO_SET(LED_ERROR_PORT, LED_ERROR_PIN_bp):GPIO_CLR(LED_ERROR_PORT, LED_ERROR_PIN_bp);
  if(sr & USART_SR_TXE)
  {

    if(uart_1_send_write_pos != uart_1_send_read_pos)
    {
      USART1->DR = uart_1_send_buffer[uart_1_send_read_pos];
      uart_1_send_read_pos = (uart_1_send_read_pos + 1) % USART_1_SEND_BUF_SIZE;
    }
    else
    {
      USART1->CR1 &= ~USART_CR1_TXEIE;
    }
  }

  if(sr & (USART_SR_RXNE | USART_SR_ORE)) 
  {
    USART1->SR &= ~(USART_SR_RXNE | USART_SR_ORE);
    uint8_t byte = USART1->DR;
    uart_1_recv_buffer[uart_1_recv_write_pos] = byte;
    uart_1_recv_write_pos = (uart_1_recv_write_pos + 1) % USART_1_RECV_BUF_SIZE;
  }
}

我的目标在 RAM 中使用向量表和 UART 功能正常运行，但我仍然在 USART 上出现溢出。在执行闪存写入操作时，我也没有禁用中断。

我还尝试从 CCM RAM 而不是 SRAM 运行代码，但我在 this post 上看到过吗？代码无法在 STMF32F4XX 上的 CCM RAM 上执行...

有什么想法吗？谢谢。

Answer 1

任何在写入操作正在进行时尝试从闪存读取数据都会导致总线停止。

为了不被闪存写入阻塞，我认为不仅中断代码，而且中断函数也必须从 RAM 运行，否则内核无法进入可能中断的状态。

尝试将闪存处理代码重新定位到 RAM。

如果可能的话，我建议切换到具有两个独立闪存组的 MCU，例如引脚和软件兼容的 427/429/437/439 系列。您可以将一个存储体专用于编程代码，将另一个存储体专用于类似 EEPROM 的数据存储，然后写入第二个存储体将不会干扰第一个存储体运行的代码。