assembly - .double 类型的变量是否存储在两个寄存器中？

Question

当我声明一个整数时，我使用指令 .word，它有 32 位，如果我是正确的，那也是 MIPS 架构中寄存器的大小。

现在，根据我的理解，.double 应该是 64 位的。这是否意味着当我将变量加载到寄存器 (lwc1) 时，它实际上存储在两个寄存器中，就像一个数组；还是协处理器上的寄存器是两倍大？

Answer 1

这取决于 MIPS 版本和硬件实现。 MIPS I 和 II 确实只有 32 个 single 浮点寄存器，所以 double 值必须存储在 2 个寄存器中

然而 MIPS III将 FPU 寄存器大小扩展到 64 位，因此每个 double 变量现在可以只在一个寄存器上

The MIPS architecture supports two FPU register models:

• 32-bit FPU register model: 32, 32-bit registers

  • 32-bit data types stored in any register

  • pre-Release 6: 64-bit data types stored in even-odd pairs of registers.

    In Release 6 the 32-bit register model does not support 64-bit data types (stored in even-odd pairs of registers), and 64-bit operations are required to signal the Reserved Instruction exception.

• 64-bit FPU register model: 32, 64-bit registers, with all formats supported in a register.

In Release 1 of the Architecture, MIPS32 supported only the 32-bit FPU register model (with even-odd register pairs for 64-bit data), while MIPS64 supported only the 64-bit FPU register model.

As of Release 2 and thereafter, both MIPS32 and MIPS64 support both FPU register models. If the CP0 Status_FR bit is writable, it allows selection of the register model, whereas if this bit is read-only, it indicates which model is supported. In Release 2 and Release 3, the 32-bit FPU register model is required, while the 64-bit FPU register model is optional. In Release 5, the 64-bit FPU register model is required.

MIPS® Architecture For Programmers Volume I-A: Introduction to the MIPS32® Architecture, Revision 6.01

事实上，在 64 位 FPU 寄存器模型中，每个寄存器可以存储两个 32 位浮点值，即 early kind of modern SIMD。在现代平台上。只是后来真正的 SIMD 扩展被添加到 MIPS