c++ - 如何计算stm32l0的i2c时序

Question

我有一个 stm32l0 系列处理器，但我不知道如何计算 i2c 时序。我想使用 Bosh bme680/bme280 传感器。我只找到 stm32F0/f3 的 Timming 配置工具。有人知道怎么计算吗？

Answer 1

TLDR:RM0377 Reference manual "Ultra-low-power STM32L0x1 advanced Arm®-based 32-bit MCUs", page 614包含示例。

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注意:我还没有真正使用过 I2C。以下所有内容均基于文档。

1. UM1749 User Manual "Description of STM32L0 HAL and Low Layerdrivers" (第233):

   uint32_t I2C_InitTypeDef::Timing Specifies the I2C_TIMINGR_register value. This parameter calculated by referring to I2C initialization section in Reference manual

2. RM0377 Reference manual "Ultra-low-power STM32L0x1 advanced Arm®-based 32-bitMCUs"(第 641 页):

   Timing register (I2C_TIMINGR)

   (...)

   PRESC[3:0] : Timing prescaler

   This field is used to prescale I2CCLK in order to generate the clock period t_PRESC used for data setup and hold counters (refer to I2C timings on page 587 ) and for SCL high and low level counters (refer to I2C master initialization on page 602 ).

   t_PRESC = (PRESC+1) x t_I2CCLK

   SCLDEL[3:0] : Data setup time This field is used to generate a delay t_SCLDEL between SDA edge and SCL rising edge. In master mode and in slave mode with NOSTRETCH = 0, the SCL line is stretched low during t_SCLDEL.

   t_SCLDEL = (SCLDEL+1) x t_PRESC

   Note: t_SCLDEL is used to generate t_SU:DAT timing.

   SDADEL[3:0] : Data hold time This field is used to generate the delay t_SDADEL between SCL falling edge and SDA edge. In master mode and in slave mode with NOSTRETCH = 0, the SCL line is stretched low during t_SDADEL.

   t_SDADEL = SDADEL x t_PRESC

   Note: SDADEL is used to generate t_HD:DAT timing.

   SCLH[7:0] : SCL high period (master mode) This field is used to generate the SCL high period in master mode.

   t_SCLH = (SCLH+1) x t_PRESC

   Note: SCLH is also used to generate t_SU:STO and t_HD:STA timing.

   SCLL[7:0] : SCL low period (master mode) This field is used to generate the SCL low period in master mode.

   t_SCLL = (SCLL+1) x t_PRESC

   Note: SCLL is also used to generate t_BUF and t_SU:STA timings.

   有关预分频器的更多信息可以在有关定时器的段落中找到(第 433 页)。

3. RM0377(第 581 页):

   The interface is connected to the I2C bus by a data pin (SDA) and by a clock pin (SCL). It can be connected with a standard (up to 100 kHz), Fast-mode (up to 400 kHz) or Fast-mode Plus (up to 1MHz) I2C bus.

   因此，为了进行通信，I2C 时钟需要具有适当的频率。

4. RM0377(第 583 页):

   This independent clock source can be selected from the following three clock sources:

   • PCLK1: APB1 clock (default value)
   • HSI16: internal 16 MHz RC oscillator
   • SYSCLK: system clock Refer to Section 7: Reset and clock control (RCC) for more details.

5. RM0377(第 604 页):

6. RM0377(第 602 页):

   t_SCL = t_SYNC1 + t_SYNC2 + {[(SCLH+1) + (SCLL+1)] x (PRESC+1) x t_I2CCLK}

   The duration of t_SYNC1 depends on these parameters:

   • SCL falling slope
   • When enabled, input delay induced by the analog filter.
   • When enabled, input delay induced by the digital filter: DNF x t_I2CCLK
   • Delay due to SCL synchronization with I2CCLK clock (2 to 3 I2CCLK periods)

   The duration of t_SYNC2 depends on these parameters:

   • SCL rising slope
   • When enabled, input delay induced by the analog filter.
   • When enabled, input delay induced by the digital filter: DNF x t_I2CCLK
   • Delay due to SCL synchronization with I2CCLK clock (2 to 3 I2CCLK periods)

7. BME280 Datasheet (第 30 页):

   All modes (standard, fast, high speed) are supported.

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全部收集起来:根据I2C的时钟频率，以及你要使用的速度，你需要选择PRESC，SCLDEL这样的值、SDADEL、SCLH、SCLL，您使用的I2C-SMBUS 规范时钟时序公式 t_SCL = t_SYNC1 + t_SYNC2 + {[(SCLH+1) + (SCLL+1)] x (PRESC+1) x t_I2CCLK}

在第 614 页的 RM0377 中还有一些I2C_TIMINGR 寄存器配置示例。