c - MSP430F5418 端口中断发生在高到低和低到高的转换中

Question

我已将 MSP430F5418 P2.5 设置为高到低转换。但是我在从低到高和从高到低的转换中都遇到了中断。请在下面查看我的代码片段。

    P2OUT |= BIT5   /* Enable P2.5 internal resistances */    P2REN |= BIT5   /* Set up P2.5 as pull-Up resistances */    P2IES |= BIT5;        P2IE  |= BIT5;        P2IFG &= ~BIT5;   /* P2.5 IFG cleared */#pragma vector=PORT2_VECTOR__interrupt void port2_interrupt (void){    switch (P2IV)    {        case 0x0CU:        {            /* Do something here */            P2IFG &= ~BIT5;            break;        }        default:        {            /* No Action */            break;        }    }}

Answer 1

汉斯，我没有使用开关来断言引脚。它实际上是由另一个处理器完成的。我在 TI(Texas instruments)论坛上得到回复说，在低到高的转换中可能存在隐藏的高到低信号，反之亦然。

所以，我修改了我的代码如下，它运行良好。

... P2OUT |= BIT5 ;   /* Enable P2.5 internal resistance */ P2REN |= BIT5;    /* Set up P2.5  as pull-up resistance */ P2IES |= BIT5;    /* Sets P2IFG for high to low transition */ P2IE  |= BIT5;    /* P2.5 interrupt enabled */ P2IFG &= ~BIT5;   /* P2.5 IFG cleared */...#pragma vector=PORT2_VECTOR__interrupt void port2_isr (void){    switch (P2IV)    {        case 0x0CU:        {            TA1CCTL0 &= ~CCIE;            TA1CCR0 = 0U;            TA1CCTL0 |= CCIE;            TA1CCTL0 &= ~CCIFG;            TA1CCR0 = TA1R + 15U;            P2IFG &= ~BIT5;            break;        }        ...        ...    }}#pragma vector = TIMER1_A0_VECTOR    /*  Timer1_A3 CC0 */static __interrupt void _timer1_ao_isr (void){    TA1CCTL0 &= ~CCIE;    if ((P2IN & BIT5) == 0U)    {       // Got a valid high-to-low assert here!!!    }}